SIL Verification
SIL Verification
SIL Verification demonstrates that each Safety Instrumented Function (SIF) in the design can achieve its target SIL in practice.
SIL Verification
It turns target requirements into PFDavg/PFH values, checks architecture against the rules, and tests whether the overall configuration really delivers the intended risk reduction.
The work covers hardware fault tolerance, diagnostic coverage, and systematic capability, and shows how proof-test interval and coverage affect performance. Workshops and calculations follow a structured, traceable approach that is easy for both engineering and functional safety teams to follow.
Assumptions are made explicit, and decisions are documented so they remain defensible under audit. The outcome is a verified design and, where needed, a clear improvement path. Detailed SIS design and implementation are handled under a separate service.
SIL Verification Background & Regulatory Context
IEC 61511 defines the SIS lifecycle for the process sector and requires that SIFs meet their target performance across specification, design, operation, and maintenance.
In the United States, ISA 84 adopts IEC 61511 as an ANSI/ISA standard, so auditors typically expect close alignment with this lifecycle. ISA TR84.00.02 (2022) provides detailed guidance for SIL Verification of SIFs, including PFDavg/PFH calculations and treatment of assumptions and data.
Verification must address not only the numerical result but also architectural constraints (such as Route 1H, Route 2H, or the IEC 61511 route). Underlying device capability and architecture concepts are drawn from IEC 61508, the generic functional safety standard.
How SIL Verification Works – Step by Step
- Inputs and Planning
The work starts by gathering the right information and agreeing the basis:
- Using the SIF list and target SILs from the SIL assessment.
- Collecting the SRS draft, drawings, logic narratives, and alarm philosophy.
- Confirming demand mode, mission time, maintenance strategy, and bypass rules.
- Agreeing data sources for failure rates and diagnostics.
- Fixing key assumptions, responsibilities, and review cadence.
This step ensures that later calculations rest on a clear, shared foundation.
- Data and Modelling Basis
Next, the modelling approach and data are defined:
- Selecting credible failure rate data and noting any FMEDA references.
- Defining diagnostic coverage, proof-test coverage, and common cause assumptions.
- Setting proof-test intervals for each subsystem.
- Documenting partial and full tests where applicable.
- Recording all inputs in a transparent Assumptions Log.
With this in place, the team can see exactly how each SIF’s performance is being represented.
- Architectural Constraints and Capability
Verification then addresses the architecture and device capability:
- Checking hardware fault tolerance against the applicable route.
- Applying Route 1H or Route 2H tables where device evidence supports them.
- Applying the IEC 61511 route when appropriate for installed equipment.
- Confirming systematic capability / SIL capability requirements for devices.
- Treating architecture limits as mandatory alongside the numeric result.
This ensures that SIFs comply with both the performance targets and the structural rules of the standards.
- PFDavg / PFH Calculation
With inputs and architecture defined, the core calculations are carried out:
- Calculating PFDavg for low-demand SIFs or PFH for high-demand / continuous modes.
- Reflecting diagnostics, test interval, test coverage, and mission time.
- Modelling configured voting (e.g., 1oo1, 1oo2, 2oo3) and β-factor effects.
- Showing how longer test intervals or lower coverage increase PFDavg.
- Keeping the calculation path traceable in line with ISA TR84.00.02 and recognized practice.
The result is a transparent numerical demonstration of whether each SIF meets its target SIL.
- Results, Gaps, and Optimization
Once calculations are completed, attention shifts to decisions and improvements:
- Comparing results to the target SIL and your risk criteria.
- Identifying gaps and presenting practical options to close them.
- Considering options such as architecture changes, improved proof testing, or device selection.
- Quantifying the impact of each option on PFDavg/PFH and architectural constraints.
- Agreeing a preferred solution with clear actions and dates.
This step turns verification insight into concrete design and maintenance improvements where needed.
- Documentation and Handover
Finally, documentation is prepared for ongoing use and future audits:
- Delivering a clean SIL Verification report and calculation files.
- Updating the SRS sections that depend on verification assumptions.
- Providing device data requests and notes on proof-test scheduling.
- Defining re-verification triggers and interfaces with PSM/MOC processes.
- Briefing the team and remaining available for FAT/SAT-related questions.
The handover supports procurement, testing, and operation while preserving a clear audit trail.
Deliverables and Client Value
Deliverables
- SIL Verification Report with scope, method, and results.
- PFDavg/PFH worksheets and Assumptions Log.
- Architectural constraints check (Route 1H / Route 2H / IEC 61511 route).
- Updated SRS excerpts and device data requirements.
- Action register with owners, priorities, and due dates.
- Executive briefing pack for leadership and auditors.
Client Value
- A defensible demonstration that each SIF meets its target SIL.
- Clear linkage between design choices and risk performance.
- Practical options to meet targets without unnecessary complexity.
- Smoother regulator and third-party reviews under ISA/IEC practice.
- Lower uncertainty during procurement, FAT/SAT, and operations.
- Confidence that the SIS follows recognized good practice.
Our Process Safety and Functional Safety specialists will provide an initial consultation and support your organisation through SIL Verification — from planning and data selection to a practical, compliant verification package.
